Digital Systems Engineering

APLICATIONS OF DIGITAL SYSTEMS IV

2007-08-20T08:32:00.000-07:00

Download: Toward an Integrated Amplifier Design with Position Feedback

In this paper we investigate the advantages and feasibility of motor control using very fast (MHz) switching in place of traditional amplifiers. We also propose an integrated
motion-control architecture based on a third-order motor model to be implemented in digital logic at an equally high rate. A switching controller combines the current and position feedback paths into a single loop. A model-based observer estimates the unsensed motor velocity. When compared to second-order controllers implemented with traditional amplifiers, the proposed design promises increased performance, better efficiency, and improved velocity estimation. Recent advances in semiconductor technology provide the required fast switching and logic with relatively standard components.
Preliminary experiments characterized nonlinearities in the motor electrical dynamics and verified good performance at frequencies up to 5 MHz.

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APLICATIONS OF DIGITAL SYSTEMS

2007-08-18T13:41:00.000-07:00

Download: Prototyping a DC motor PI Controller Using FPGA

A Proportional-Integrate controller was implemented on a single-chip Xilinx Field Programmable Gate Arrays (FPGA). The controller was designed for angular position control of a DC servomotor. The FPGA was designed in Handel-C language, using Fixed-point numbers. The PI controller took approximately 1% of the total look-up-tables of a Xilinx virtex v1000 FPGA, and had a maximum clock rate of 4.6MHz.
The prototyping environment consisted of an FPGA evaluation card, a data acquisition card that has 8 channels on-board ADC and two DAC, and a computer with Windows NT4.0 operation system.
This goal of this work is to evaluate the FPGAs’ performance in digital control applications.
Detailed experimental results were shown in this report. It was concluded that FPGAs have sufficient computation power for some custom digital control applications.

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APLICATIONS OF DIGITAL SYSTEMS III

2007-08-16T13:36:00.000-07:00

Download: Motor Control Using FPSLIC FPGA

This application note describes the implementation of Pulse Width Modulation (PWM) and Quadrature Decoder/Counter modules for motor control and motor sensor applications.
The on-chip FPGA (up to 40K gates) can be used to implement multiple programmable PWM and Quadrature Decoder modules, allowing designers to implement multiple channels of programmable PWM and Quadrature Decoders. The high performance 8 - bit microcontroller provides up to 3 additional PWM counters that can be configured as 8-, 9- or 10-bit PWM's. The added advantage of the on-chip microcontroller is that it can be used for reading PWMs and Quadrature decoders, and to perform the required processing in determining the motor speed and the distance travelled, providing the single chip solution for most of the motor related applications, see Figure 1.
Typical applications are printers, plotters, Data X-Y Logger, industrial and medical precision equipment, robotics, audio amplifiers, copiers, scanners and many others.

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APLICATIONS OF DIGITAL SYSTEMS II

2007-08-15T11:23:00.000-07:00

FPGA Motor Control Reference Design

With the growing complexity of motor and motion control applications, it becomes apparent that a Field Programmable Gate Array (FPGA) offers significant advantage over the off the shelf Application Specific Standard Product (ASSP) solutions in the areas of performance, flexibility and inventory control. With an FPGA, calculations that would normally consume large amounts of CPU time when implemented in software may be hardware accelerated. Using hardware acceleration allows for more functionality within the system software. Custom motor drive interfaces such as PWM can be developed easily, quickly and at low cost. Additionally, because of full configurability, the same FPGA can be used in various product ranges, reducing the need to maintain inventory for multiple devices.

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APLICATIONS OF DIGITAL SYSTEMS

2007-08-13T08:56:00.000-07:00

Download: FPGA Implementation of Closed-loop Control system for small-scale Robot

Small robots can be beneficial to important applications such as civilian search and rescue and military surveillance, but their limited resources constrain their functionality and performance. To address this, a reconfigurable technique based on field-programmable gate arrays (FPGAs) may be applied, which has the potential for greater functionality and higher performance, but with smaller volume and lower power dissipation.
This project investigates an FPGA-based PID motion control system for small, self-adaptive systems. For one channel control, parallel and serial architectures for the PID control algorithm are designed and implemented. Based on these one channel designs, four architectures for multiple-channel control are proposed and two channel-level serial (CLS) architectures are designed and implemented. Functional correctness of all the designs was verified in motor control experiments, and area, speed, and power consumption were analyzed. The tradeoffs between the different designs are discussed in terms of area, power consumption, and execution time with respect to number of channels, sampling rate, and control clock frequency. The data gathered in this paper will be leveraged in future work to dynamically adapt the robot at run time.

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The VHDL cookbook

2007-08-09T07:12:00.000-07:00

Download: The VHDL cookbook

Introduction
VHDL is like a programming language
VHDL describes structure
VHDL describes behavior
Model organization
Advanced VHDL
Sample models: The DP32 processor

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VHDL Tutorial

2007-08-08T07:14:00.000-07:00

VHDL Tutorial

Introduction
Fundamental concepts
VHDL is like a programming language
Basic Modeling constructs
Subprograms
Packages and Use Clauses
Resolved signals
Generic constants

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ISE Quick Start Tutorial

2007-08-07T10:08:00.000-07:00

Download: ISE Quick Start Tutorial

The ISE Quick Start Tutorial is a hands-on learning tool for new users of the ISE software and for users who wish to refresh their knowledge of the software. This tutorial is current for ISE 6.x. The tutorial demonstrates basic set-up and design methods available in the PC version of the ISE software. By the end of the tutorial, you will have a greater understanding of how to implement your own design flow using the ISE software.
In the ISE Quick Start Tutorial, you will create a new project called Tutorial, in which you will design a 4-bit counter module, simulate and implement the design, and view the results.
Following the ISE Quick Start Tutorial, an appendix, EDIF Design, demonstrates how to implement an existing netlist using the ISE software.

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Programmable Logic Design Quick Start Handbook

2007-08-06T07:51:00.000-07:00

Download: Programmable Logic Design Quick Start Handbook

Whether you design with discrete logic, base all of your designs on microcontrollers, or simply want to learn how to use the latest and most advanced programmable logic software, you will find this book an interesting insight into a different way to design.
Programmable logic devices were invented in the late seventies and since then have proved to be very popular and are now one of the largest growing sectors in the semiconductor industry. Why are programmable logic devices so widely used? Programmable logic devices provide designers ultimate flexibility, time to market advantage, design integration, are easy to design with and can be reprogrammed time and time again even in the field to upgrade system functionality.
This book was written to complement the popular Xilinx Campus Seminar series but can also be used as a stand-alone tutorial and information source for the first of your many programmable logic designs.
After you have finished your first design this book will prove useful as a reference guide or quick start handbook.
The book details the history of programmable logic, where and how to use them, how to install the free, full functioning design software (Xilinx WebPACK® ISE included with this book) and then guides you through your first of many designs. There are also sections on VHDL and schematic capture design entry and finally a data bank of useful applications examples.
We hope you find the book practical, informative and above all easy to use.

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Getting started with FPGA Design

2007-08-04T13:16:00.000-07:00

Getting started with FPGA Design

Creating an FPGA project
Creating a schematic source document
Placing parts on the schematic
Creating connections
Checking the design
Configuring your design
Using the devices view to program the FPGA
Adding a sub sheet for the clock divider
Adding a VHDL file for the clock divider

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Introduction to WebPACK 4.1 for FPGAs

2007-08-03T10:46:00.000-07:00

Download: Introduction to WebPACK 4.1 for FPGAs

What this is and is not
FPGA programming
Installing WebPACK
Our first design
Hierarchical design

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MAX + Plus II Tutorial Manual

2007-08-02T12:51:00.000-07:00

Download: MAX + Plus II Tutorial Manual

Introduction
Creating a design in VHDL
Compiling your VHDL code
MAX + Plus II simulator
MAX + Plus II Timing Analyzer
Analyzing synthesis results
Changing compiler settings
Guidelines
Resources
Appendixes

MAX + Plus II – Tutorial

Using Quartus II CAD software

Quartus II Simulation with VHDL Designs

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Architecture of FPGAs and CPLDs

2007-08-01T11:17:00.000-07:00

Architecture of FPGAs and CPLDs: A Tutorial

This paper provides a tutorial survey of architectures of commercially available high-capacity field-programmable devices (FPDs). We first define the relevant terminology in the field and then describe the recent evolution of FPDs. The three main categories of FPDs are delineated: Simple PLDs (SPLDs), Complex PLDs (CPLDs) and Field- Programmable Gate Arrays (FPGAs). We then give details of the
architectures of all of the most important commercially available chips, and give examples of applications of each type of device.

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