APLICATIONS OF DIGITAL SYSTEMS IV

Download: Toward an Integrated Amplifier Design with Position Feedback

In this paper we investigate the advantages and feasibility of motor control using very fast (MHz) switching in place of traditional amplifiers. We also propose an integrated
motion-control architecture based on a third-order motor model to be implemented in digital logic at an equally high rate. A switching controller combines the current and position feedback paths into a single loop. A model-based observer estimates the unsensed motor velocity. When compared to second-order controllers implemented with traditional amplifiers, the proposed design promises increased performance, better efficiency, and improved velocity estimation. Recent advances in semiconductor technology provide the required fast switching and logic with relatively standard components.
Preliminary experiments characterized nonlinearities in the motor electrical dynamics and verified good performance at frequencies up to 5 MHz.


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APLICATIONS OF DIGITAL SYSTEMS

Download: Prototyping a DC motor PI Controller Using FPGA

A Proportional-Integrate controller was implemented on a single-chip Xilinx Field Programmable Gate Arrays (FPGA). The controller was designed for angular position control of a DC servomotor. The FPGA was designed in Handel-C language, using Fixed-point numbers. The PI controller took approximately 1% of the total look-up-tables of a Xilinx virtex v1000 FPGA, and had a maximum clock rate of 4.6MHz.
The prototyping environment consisted of an FPGA evaluation card, a data acquisition card that has 8 channels on-board ADC and two DAC, and a computer with Windows NT4.0 operation system.
This goal of this work is to evaluate the FPGAs’ performance in digital control applications.
Detailed experimental results were shown in this report. It was concluded that FPGAs have sufficient computation power for some custom digital control applications.


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APLICATIONS OF DIGITAL SYSTEMS III

Download: Motor Control Using FPSLIC FPGA

This application note describes the implementation of Pulse Width Modulation (PWM) and Quadrature Decoder/Counter modules for motor control and motor sensor applications.
The on-chip FPGA (up to 40K gates) can be used to implement multiple programmable PWM and Quadrature Decoder modules, allowing designers to implement multiple channels of programmable PWM and Quadrature Decoders. The high performance 8 - bit microcontroller provides up to 3 additional PWM counters that can be configured as 8-, 9- or 10-bit PWM's. The added advantage of the on-chip microcontroller is that it can be used for reading PWMs and Quadrature decoders, and to perform the required processing in determining the motor speed and the distance travelled, providing the single chip solution for most of the motor related applications, see Figure 1.
Typical applications are printers, plotters, Data X-Y Logger, industrial and medical precision equipment, robotics, audio amplifiers, copiers, scanners and many others.



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APLICATIONS OF DIGITAL SYSTEMS II

FPGA Motor Control Reference Design

With the growing complexity of motor and motion control applications, it becomes apparent that a Field Programmable Gate Array (FPGA) offers significant advantage over the off the shelf Application Specific Standard Product (ASSP) solutions in the areas of performance, flexibility and inventory control. With an FPGA, calculations that would normally consume large amounts of CPU time when implemented in software may be hardware accelerated. Using hardware acceleration allows for more functionality within the system software. Custom motor drive interfaces such as PWM can be developed easily, quickly and at low cost. Additionally, because of full configurability, the same FPGA can be used in various product ranges, reducing the need to maintain inventory for multiple devices.



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APLICATIONS OF DIGITAL SYSTEMS

Download: FPGA Implementation of Closed-loop Control system for small-scale Robot

Small robots can be beneficial to important applications such as civilian search and rescue and military surveillance, but their limited resources constrain their functionality and performance. To address this, a reconfigurable technique based on field-programmable gate arrays (FPGAs) may be applied, which has the potential for greater functionality and higher performance, but with smaller volume and lower power dissipation.
This project investigates an FPGA-based PID motion control system for small, self-adaptive systems. For one channel control, parallel and serial architectures for the PID control algorithm are designed and implemented. Based on these one channel designs, four architectures for multiple-channel control are proposed and two channel-level serial (CLS) architectures are designed and implemented. Functional correctness of all the designs was verified in motor control experiments, and area, speed, and power consumption were analyzed. The tradeoffs between the different designs are discussed in terms of area, power consumption, and execution time with respect to number of channels, sampling rate, and control clock frequency. The data gathered in this paper will be leveraged in future work to dynamically adapt the robot at run time.



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